Specifications
Recommended Operating Conditions
| SUPPLY VOLTAGE | MIN | TYP | MAX | UNIT |
|---|---|---|---|---|
| 12 VDC | +11.4 | +12 | +12.6 | V |
| 3.3 VDC | +3.14 | +3.3 | +3.46 | V |
| VADJ (1.2VDC) | +1.14 | +1.2 | +1.26 | V |
| VADJ (1.5VDC) | +1.425 | +1.5 | +1.575 | V |
| VADJ (1.8VDC) | +1.71 | +1.8 | +1.89 | V |
| VADJ (2.5VDC) | +2.375 | +2.5 | +2.625 | V |
Notes:
- All VADJ pins must be supplied with the same voltage chosen from one of the following levels: +1.2VDC, +1.5VDC, +1.8VDC, +2.5VDC. Note that many carriers have a system controller that will make this choice for you.
Power Consumption
Power consumption measurements will be added to this section in the near future.
Thermal Information
We have not performed comprehensive thermal testing on the Ethernet FMC Max, however we recommend that it be operated under ambient temperatures between -40 and 85 degrees C. This advice is based on the recommended ambient operating temperatures of the critical devices on the Ethernet FMC Max. These temperatures are listed in the table below.
| DEVICE | MIN | MAX | UNIT |
|---|---|---|---|
| TI, 1A Step Down Converter, TLV62568APDRLR | -40 | 125 | C |
| TI, 10/100/1000 Ethernet PHY, DP83867ISRGZ | -40 | 85 | C |
| Link-PP, Quad RJ45, LPJE4718AGNL | -40 | 85 | C |
| Skyworks, Crystal Oscillator 125MHz, 511BBA125M000BAG | -40 | 85 | C |
| ON Semi, TinyLogic ULP-A Dual Buffer, NC7WV16P6X | -40 | 85 | C |
| Link-PP, Quad Ethernet Magnetics, LP84862ANL | -40 | 85 | C |
| TI, Voltage Translator, SN74AVC4T245RSVR | -40 | 85 | C |
Components that are not listed in the table above (such as resistors, capacitors) are selected to have minimum operating temperature that is lower than -40 degrees C, and maximum operating temperature that is greater than 85 degrees C.
Reset Timing
When hardware resetting the PHYs, we recommend using this timing:
- Hold the RESET_N signal LOW for 1ms
- Release the RESET_N signal (HIGH) and wait for 1ms
I2C (EEPROM) Timing
The serial EEPROM (part number ST, 2K EEPROM, M24C02-FDW6TP ) has a maximum operating clock frequency of 400 kHz.
MDIO Timing
- The maximum MDC frequency supported by the DP83867 PHY is 25MHz.
DP83867 Electrical and Timing
For electrical specs and timing related to the DP83867 signals listed below, please refer to the DP83867 datasheet :
- Reset
- SGMII
- MDIO
Certifications
- RoHS
- CE